Perkins Medium-Res Mode
A Commentary by MCM Design
Dec 2021

After I wired the hi-res TV display scan scheme on my final hi-res Astrocade project breadboard, I thought it would be a good time to see if I could generate a medium-res screen map using Perkins med-res hardware scheme.

The Perkins interfacing scheme for his low/med/hi-res modified Astrocade is archived on the Bally Alley.com website. The link for Perkins interfacing schematic is provided below.

https://ballyalley.com/perkins/Perkins_Hi-Res_Schematics/Hi-Res%20Astrocade%20Schematics%20(198x)(Perkins%20Engineering).pdf

THEORY OF OPERATION

I have studied and broken down Perkins interfacing schematic into sections so the scheme is easier to read. I can say that I have a fundamental grasp of the Perkins med-res theory of operation.

The med-res hardware is simplistic but clever. At the upper right of the schematic are two LS00C and D gates. The 74LS00 chip was piggybacked on top of the U22 motherboard chip.

Pin 2 of LS00D is wired to the motherboard PX clock. Pin 1 is wired to Perkins custom output port 08H, shown on the upper left in the Perkins schematic. The very top of the Perkins schematic is clipped off.

Normally, bit 0 of the Astrocade output port 08H is used to set the custom address and data chips to low-res when bit 0 = 0 and hi-res when bit 0 = 1. A program must output this bit 0 request to port 08H plus set up the TV display screen parameters.

Perkins used bit 1 to request a med-res screen RAM memory map. His custom output port 08H bit 1 was wired to pin 1 of LS00D. A bit 1 = 1 would pass the PX clock onto the pins 15 of the four 74LS165 chips, which were used to shift screen RAM video data to the motherboard custom data chip using the two Serial 0 and Serial 1 lines.

Pin 15 on a 74LS165 chip is a clock inhibit (CI) pin. The four 74LS165 chips operate using the motherboard negated 7M clock present at the motherboard U32 chip pin 3 (actually U16 pin 6).

Normally in hi-res, one byte (8 bits) from each of the 4 screen RAM banks is scanned (read) simultaneously. The 32 bits of video data are all wired to the four 74LS165 data input pins (8 inputs per chip).

Timing is such that when the shift/load (S/L) pin 1 at the 74LS165 chips goes low, then all 32 bits of video data are shifted serially via the Serial 0 and 1 lines into the motherboard custom data chip input pins 11 and 12. Serial 0 is for "even" video data bits and Serial 1 is for "odd" video data bits.

A pixel is defined by 2 bits. Four screen RAM memory bytes (32 bits) scanned (read) simultaneously sends 16 pixels to the 74LS165 chips.

As stated above, the PX clock is passed onto the 74LS165 chips via an output of 03H to port 08H, where:

bit 0 = 1      custom address/data chips to operate in hi-res
bit 1 = 1      pass PX clock to 74LS165 chips at pins 15.

When PX is present at all four pins 15, then every other 7M clock uptick is inhibited (turned off), so only 16 bits  (instead of 32 bits) are shifted out to the custom data chip. Only the first 16 bits are shifted out, 8 bits from screen RAM bank 1, then 8 bits from bank 0.

The med-res mode uses only screen RAM banks 0 and 1 for the screen memory map. Hi-res banks 2 and 3 are still active, but are not used for the med-res map. The Z80 CPU can still write to or read from banks 2 and 3 during the med-res mode.

In the med-res mode, banks 2 and 3 can be used for storing data or programs up to 8KB. That is a med-res benefit.

However, med-res has 3 drawbacks.

As a reminder, the pixel resolution for the hi-res and med-res maps are listed below.

hi-res map        320 x 204 pixels
med-res map    160 x 204 pixels

Here are the 3 drawbacks.
1. A med-res pixel is twice as wide as it is high. Some graphic patterns may look disproportionate.

2. The magic (pixel) shifter is likely, nearly useless, because of the med-res unorthodox memory map. This is a major drawback in my opinion. Magic pop, flop, OR plus XOR graphic writes are likely usable, but with a very limited magic shift capability.

3. The med-res screen memory map is unorthodox. Below is an example of the top left memory map line for the hi and med-res modes beginning at 4000H.

Hi-Res (first 8 bytes)
Each byte alternates being mapped from banks 0, 1, 2 and 3 repeating this map sequence thereafter.

4000   4001   4002   4003   4004   4005   4006   4007

Med-Res (first 4 bytes, double wide pixels)
Each byte alternates being mapped from banks 0 and 1 only repeating this map sequence thereafter.

      4000               4001              4004               4005

Med-Res (first 8 bytes)
Each byte alternates being mapped from banks 0 and 1 only repeating this map sequence thereafter.
4000   4001   4004   4005   4008   4009   400C   400D

Imagine trying to write a machine language graphic pattern write subroutine using this unusual med-res memory map. Possible, but very challenging.

Note: I'm confident that the above theory of operation is accurate.

MCMs BREADBOARD EXPERIMENTS

I did attempt to run Perkins med-res scheme on my final hi-res Astrocade breadboard using 74LS166 and 74LS165 chips. I wired up two 74LS00 NAND gates and simulated an output port 08H bit 1 connection to pin 1 at LS00D using a pull-up resistor connected at that pin where:

Bit 1= 1    med-res, float pin 1 at LS00D
Bit 1 = 0   no med-res, hi-res instead, gnd pin 1 at LS00D

Experiment 1 using 74LS166 chips

My setup tried to display a med-res map. When switching from hi-res to med-res by floating pin 1, I could see a portion of the screen RAM area partially mapped in med-res.

Using a negated 7M clock at the 74LS166 chips created major TV display disturbances. Why? I don't know. Maybe this is why Perkins chose 74LS165 chips instead of the normal 74LS166 chips.

My data sheets for the 74LS165 and 74LS166 chips are pretty vague. The only differences I could see in the data sheets were the pin layouts and one pin with a different application.

Experiment 2 using 74LS165 chips

The setup was a complete failure. I double checked all wiring for accuracy.

Experiment 3 using 74LS166 chips with an alternate 7M and negated PX clock option.

Nothing happened when I floated pin 1. The hi-res map remained hi-res when pin 1 was floated.

I hooked up my logic analyzer at the 7M and negated PX clocks. I wanted to see the PX waveform relative to the 7M waveform. I thought I might be able to shift the PX clock using some extra gates so it would inhibit the 7M clock properly to generate the med-res map. I was surprised to see that the PX clock was not symmetrical over time. In fact, some clock pulses were irregular at times. Why? Maybe because of the length of the clock lines from the motherboard to the breadboard. Perkins had shorter clock lines to work with. Maybe my Kingst logic analyzer is a low grade (cheap) test device and is not very accurate. Based on the LA sampling test, I could see why using the alternate 7M and negated PX clock combo option could not possibly generate a med-res map.

FINAL THOUGHTS

Well, I spent a good amount of time trying to generate a med-res map on my low/hi-res screen SRAM breadboard. I saw a portion of the med-res mode anyway.

As an added note, Perkins used dynamic RAM. As I have stated and shown in one of my videos on my YouTube channel, you don't even need screen RAM to display a hi-res TV map. The same should be true for a Perkins med-res TV display, as long as you have a perfect working hi-res TV display video scan scheme wired on a breadboard along with a machine language program in the 2000H cassette slot which outputs a hi-res request to port 08H and sets ups the screen parameters. You can float or ground the 32 data inputs at the 74LS165 or 74LS166 chips to display hi-res verticals stripes top to bottom. You can also choose the width or color of these stripes by floating or grounding the 32 inputs appropriately.

Even if I managed to get the med-res mode working perfect, I likely would not include this mode in my final hi-res Astrocade because of its unorthodox memory map with a very limited magic shifter capability. I would not want to support this mode spending time to create ML graphic write subroutines.

I wanted to submit to you a final report of my investigation and experimental attempts on Perkins med-res mode in case you wanted to post this info in the Perkins hi-res section on the Bally Alley.

If you're interested, I would be willing to redraw (cleanup) my sketch breakdowns of Perkins "hard to read" interfacing schematic, AFTER I finish my current hi-res Astrocade project. Someone might be interested and find this info useful in the future and use the info to generate the med-res mode successfully. Let me know if you would like to post the MCM sketches on the Bally Alley.

Bye.
MCM